Department	Communication
Job Type	Contractual
Station	NASTP Alpha Rawalpindi
Gender	Both
Last Date to Apply	09-03-2026

The Manager (DSP) will be responsible for the design, development and integration of advanced DSP solutions using custom hardware / software. This includes expertise in pulse deinterleaving, digital channelizer, clustering algorithms and other DSP applications. The candidate must demonstrate strong experience in DSP implementation, logic development and programming across multiple platforms.

·      Design software solutions for Fourier transforms, channelizer architectures, wideband IQ recording, audio buffering and streaming applications.

·      Apply DSP, filtering and data analysis techniques to explore new algorithms and propose architectural improvements.

·      Design and implement DSP algorithms for multiple applications.

·      Analyze and refine existing DSP algorithms for efficiency and scalability.

·      Optimize DSP systems for real-time, high performance processing.

·      Create validation models in MATLAB, Simulink, Lab VIEW or equivalent tools.

·      Implement DSP algorithms on FGPA, DSP processors and SDR platforms.

·      Prepare comprehensive technical documentation (design specification, manuals and test reports).

·      Collaborate with hardware / software teams for system-level integration.

·      Stay updated with latest DSP advancements and apply innovate techniques to current projects. 

·      MS / PhD in Electrical / Electronic or Avionics Engineering (minimum CGPA 3.0).

·      Degree preferably from HEC-recognized or reputable foreign institute. 

·      Minimum 5+ years' experience of DSP algorithm development and Implementation.

·      Preference would be given to candidates with experience in embedded DSP platforms, FPGA design or real-time systems.

·      Strong foundation in DSP theory and application.

·      Programming expertise in C/C++, Python, MATLAB, LabVIEW and Vivado.

·      Familiarity with communication systems, radar, audio, DF/MIMO applications.

·      Experience with FPGA/DSP-based embedded design.

·      Hands-on experience with VSA, USRP and SDR platforms of Analog Devices.

·      Knowledge of CDIF algorithms and QMH frameworks.

·      Excellent problem-solving, documentation and communication skills.

·      Ability to manage multiple high-priority projects simultaneously.

 

Additional Notes

 

·      6-month probation including 2-3 months of structured training.

·      Final appointment to be confirmed after successful probation.

·      All candidates who applied earlier for the same position may not apply again. Their application submitted earlier, will be included in selection process.